From 06108658053efd7cc0743ee5caa913b7bdfa0260 Mon Sep 17 00:00:00 2001 From: xengineering Date: Sun, 23 Jan 2022 13:36:16 +0100 Subject: Simplify structure of firmware directory --- firmware/Makefile | 4 +- firmware/ld/stm32f103c8t6.ld | 9 --- firmware/main.c | 143 +++++++++++++++++++++++++++++++++++++++++++ firmware/src/main.c | 143 ------------------------------------------- firmware/stm32f103c8t6.ld | 9 +++ 5 files changed, 154 insertions(+), 154 deletions(-) delete mode 100644 firmware/ld/stm32f103c8t6.ld create mode 100644 firmware/main.c delete mode 100644 firmware/src/main.c create mode 100644 firmware/stm32f103c8t6.ld diff --git a/firmware/Makefile b/firmware/Makefile index 4698df5..14069f6 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -7,8 +7,8 @@ OBJCOPY = $(PREFIX)-objcopy all: libopencm3/lib/libopencm3_stm32f1.a mkdir -p build - $(CC) -O0 -c -g -DSTM32F1 -Ilibopencm3/include -mcpu=cortex-m3 -mthumb -o build/main.o src/main.c - $(LD) --static -nostartfiles -mcpu=cortex-m3 -mthumb -msoft-float -Tld/stm32f103c8t6.ld -Llibopencm3/lib build/main.o -lopencm3_stm32f1 -o build/ledcontrol.elf + $(CC) -O0 -c -g -DSTM32F1 -Ilibopencm3/include -mcpu=cortex-m3 -mthumb -o build/main.o main.c + $(LD) --static -nostartfiles -mcpu=cortex-m3 -mthumb -msoft-float -Tstm32f103c8t6.ld -Llibopencm3/lib build/main.o -lopencm3_stm32f1 -o build/ledcontrol.elf $(OBJCOPY) -O binary build/ledcontrol.elf build/ledcontrol.bin libopencm3/lib/libopencm3_stm32f1.a: diff --git a/firmware/ld/stm32f103c8t6.ld b/firmware/ld/stm32f103c8t6.ld deleted file mode 100644 index db01550..0000000 --- a/firmware/ld/stm32f103c8t6.ld +++ /dev/null @@ -1,9 +0,0 @@ - -MEMORY -{ - rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K -} - -INCLUDE cortex-m-generic.ld - diff --git a/firmware/main.c b/firmware/main.c new file mode 100644 index 0000000..8e39278 --- /dev/null +++ b/firmware/main.c @@ -0,0 +1,143 @@ +// vim: shiftwidth=4 tabstop=4 noexpandtab + + +#include +#include +#include +#include + + +static void clock_init(void); +static void gpio_init(void); +static void nvic_init(void); +static void timer_init(void); + +void tim2_isr(void); + + +void main(void) +{ + clock_init(); + gpio_init(); + gpio_clear(GPIOC, GPIO13); // set onboard LED on + nvic_init(); + timer_init(); + + while(1); // wait forever +} + + +static void clock_init(void) +{ + // set sysclk to 72 MHz via external 8 MHz crystal + rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE8_72MHZ]); + + // enable clocks for GPIO ports B and C + rcc_periph_clock_enable(RCC_GPIOB); + rcc_periph_clock_enable(RCC_GPIOC); + + // enable clock for timer 2 (blinking) + rcc_periph_clock_enable(RCC_TIM2); + + // enable clock for timer 3 (PWM) + rcc_periph_clock_enable(RCC_TIM3); + + // enable clock for alternate functions + rcc_periph_clock_enable(RCC_AFIO); // TODO is this necessary? +} + + +static void gpio_init(void) +{ + // init PC13 onboard LED for blinking + gpio_set_mode( + GPIOC, + GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, + GPIO13 + ); + + // setup PB0 (connected to TIM3_CH3) for PWM + gpio_set_mode( + GPIOB, + GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, + GPIO_TIM3_CH3 + ); +} + + +static void nvic_init(void) +{ + // enable timer 2 interrupt and set priority + nvic_enable_irq(NVIC_TIM2_IRQ); + nvic_set_priority(NVIC_TIM2_IRQ, 1); +} + + +static void timer_init(void) +{ + // setup timer 2 for blinking + timer_set_counter(TIM2, 1); + timer_set_prescaler(TIM2, 1440); + timer_set_period(TIM2, 50); + + // enable timer / counter 2 and the corresponding interrupt for blinking + timer_enable_irq(TIM2, TIM_DIER_UIE); + timer_enable_counter(TIM2); + + /* + enable timer / counter 3 + */ + + /* Clock division and mode */ + TIM3_CR1 = TIM_CR1_CKD_CK_INT | TIM_CR1_CMS_EDGE; + /* Period */ + TIM3_ARR = 65535; + /* Prescaler */ + TIM3_PSC = 0; + TIM3_EGR = TIM_EGR_UG; + + /* ---- */ + /* Output compare 3 mode and preload */ + TIM3_CCMR2 |= TIM_CCMR2_OC3M_PWM1 | TIM_CCMR2_OC3PE; + + /* Polarity and state */ + TIM3_CCER |= TIM_CCER_CC3P | TIM_CCER_CC3E; + //TIM3_CCER |= TIM_CCER_CC3E; + + /* Capture compare value */ + TIM3_CCR3 = 30000; + + /* ---- */ + /* ARR reload enable */ + TIM3_CR1 |= TIM_CR1_ARPE; + + /* Counter enable */ + TIM3_CR1 |= TIM_CR1_CEN; +} + + +void tim2_isr(void) +{ + // PWM handling + static uint32_t pwm_value; + if (pwm_value == 0) { + pwm_value = 65535; + } + else { + pwm_value -= 20; + } + TIM3_CCR3 = pwm_value; + + // toggle blink LED + static uint32_t counter; + counter += 1; + if (counter > 500) { + gpio_toggle(GPIOC, GPIO13); + counter = 0; + } + + // clear interrrupt flag + TIM_SR(TIM2) &= ~TIM_SR_UIF; +} diff --git a/firmware/src/main.c b/firmware/src/main.c deleted file mode 100644 index 8e39278..0000000 --- a/firmware/src/main.c +++ /dev/null @@ -1,143 +0,0 @@ -// vim: shiftwidth=4 tabstop=4 noexpandtab - - -#include -#include -#include -#include - - -static void clock_init(void); -static void gpio_init(void); -static void nvic_init(void); -static void timer_init(void); - -void tim2_isr(void); - - -void main(void) -{ - clock_init(); - gpio_init(); - gpio_clear(GPIOC, GPIO13); // set onboard LED on - nvic_init(); - timer_init(); - - while(1); // wait forever -} - - -static void clock_init(void) -{ - // set sysclk to 72 MHz via external 8 MHz crystal - rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE8_72MHZ]); - - // enable clocks for GPIO ports B and C - rcc_periph_clock_enable(RCC_GPIOB); - rcc_periph_clock_enable(RCC_GPIOC); - - // enable clock for timer 2 (blinking) - rcc_periph_clock_enable(RCC_TIM2); - - // enable clock for timer 3 (PWM) - rcc_periph_clock_enable(RCC_TIM3); - - // enable clock for alternate functions - rcc_periph_clock_enable(RCC_AFIO); // TODO is this necessary? -} - - -static void gpio_init(void) -{ - // init PC13 onboard LED for blinking - gpio_set_mode( - GPIOC, - GPIO_MODE_OUTPUT_50_MHZ, - GPIO_CNF_OUTPUT_PUSHPULL, - GPIO13 - ); - - // setup PB0 (connected to TIM3_CH3) for PWM - gpio_set_mode( - GPIOB, - GPIO_MODE_OUTPUT_50_MHZ, - GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, - GPIO_TIM3_CH3 - ); -} - - -static void nvic_init(void) -{ - // enable timer 2 interrupt and set priority - nvic_enable_irq(NVIC_TIM2_IRQ); - nvic_set_priority(NVIC_TIM2_IRQ, 1); -} - - -static void timer_init(void) -{ - // setup timer 2 for blinking - timer_set_counter(TIM2, 1); - timer_set_prescaler(TIM2, 1440); - timer_set_period(TIM2, 50); - - // enable timer / counter 2 and the corresponding interrupt for blinking - timer_enable_irq(TIM2, TIM_DIER_UIE); - timer_enable_counter(TIM2); - - /* - enable timer / counter 3 - */ - - /* Clock division and mode */ - TIM3_CR1 = TIM_CR1_CKD_CK_INT | TIM_CR1_CMS_EDGE; - /* Period */ - TIM3_ARR = 65535; - /* Prescaler */ - TIM3_PSC = 0; - TIM3_EGR = TIM_EGR_UG; - - /* ---- */ - /* Output compare 3 mode and preload */ - TIM3_CCMR2 |= TIM_CCMR2_OC3M_PWM1 | TIM_CCMR2_OC3PE; - - /* Polarity and state */ - TIM3_CCER |= TIM_CCER_CC3P | TIM_CCER_CC3E; - //TIM3_CCER |= TIM_CCER_CC3E; - - /* Capture compare value */ - TIM3_CCR3 = 30000; - - /* ---- */ - /* ARR reload enable */ - TIM3_CR1 |= TIM_CR1_ARPE; - - /* Counter enable */ - TIM3_CR1 |= TIM_CR1_CEN; -} - - -void tim2_isr(void) -{ - // PWM handling - static uint32_t pwm_value; - if (pwm_value == 0) { - pwm_value = 65535; - } - else { - pwm_value -= 20; - } - TIM3_CCR3 = pwm_value; - - // toggle blink LED - static uint32_t counter; - counter += 1; - if (counter > 500) { - gpio_toggle(GPIOC, GPIO13); - counter = 0; - } - - // clear interrrupt flag - TIM_SR(TIM2) &= ~TIM_SR_UIF; -} diff --git a/firmware/stm32f103c8t6.ld b/firmware/stm32f103c8t6.ld new file mode 100644 index 0000000..db01550 --- /dev/null +++ b/firmware/stm32f103c8t6.ld @@ -0,0 +1,9 @@ + +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +INCLUDE cortex-m-generic.ld + -- cgit v1.2.3-70-g09d2