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authorxengineering <me@xengineering.eu>2025-01-29 21:30:04 +0100
committerxengineering <me@xengineering.eu>2025-01-29 21:30:04 +0100
commit77809162cf42f65157260e5ffc7b98fdfacac8d0 (patch)
treeadf6987a0409928b5260021d18a9e3bd01e87224 /Makefile
parentca4e9a0cb24b765cac922e39eecce16e8c17ce55 (diff)
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pcb: U5: Finish hierarchical labels for serial ports
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