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authorxengineering <me@xengineering.eu>2024-01-01 18:10:07 +0100
committerxengineering <me@xengineering.eu>2024-01-02 15:16:53 +0100
commit35ec58bf32d9a8706e9c0e7c42d40a59bd793319 (patch)
treeff69482b83bdabd2fb2cb7b97ebb73616ecf0da3 /mech
parent187cf96353817701bb49d51117f2dd4f5099e597 (diff)
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mech: Set correct position for PCB
Diffstat (limited to 'mech')
-rw-r--r--mech/assembly.scad21
-rw-r--r--mech/pcb_case/pcb.scad4
2 files changed, 17 insertions, 8 deletions
diff --git a/mech/assembly.scad b/mech/assembly.scad
index 9111439..fdb859b 100644
--- a/mech/assembly.scad
+++ b/mech/assembly.scad
@@ -8,12 +8,21 @@ module assembly() {
base_drilling = [3.5, 3.5];
dx = [23, 0];
dy = [0, 58];
- pcb([30, 65, 1.4], [
- base_drilling,
- base_drilling + dx,
- base_drilling + dy,
- base_drilling + dx + dy]
- ]);
+ pcb(
+ dim=[30, 65, 1.4],
+ drillings=[
+ base_drilling,
+ base_drilling + dx,
+ base_drilling + dy,
+ base_drilling + dx + dy
+ ],
+ margins=[
+ [1, 1],
+ [3.6, 1.7],
+ [3.5, 9]
+ ],
+ t=2
+ );
bottom();
// top();
diff --git a/mech/pcb_case/pcb.scad b/mech/pcb_case/pcb.scad
index ba211ac..23602be 100644
--- a/mech/pcb_case/pcb.scad
+++ b/mech/pcb_case/pcb.scad
@@ -1,5 +1,5 @@
-module pcb(dim, drillings) {
- translate([15, 5, 15]) {
+module pcb(dim, drillings, margins, t) {
+ translate([2*t+margins[0][0], 2*t+margins[1][0], t+margins[2][0]]) {
difference() {
cube([dim[0], dim[1], dim[2]]);
for (drilling = drillings) {